PIC18F13K50-I/P【PDF 199/285 页】IC PIC MCU FLASH 4KX16 20-PDIP

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Sheet目录3873

195页 196页 197页 198页 [199页]200页 201页 202页 203页

2006 Microchip Technology Inc.

Preliminary

DS70178C-page 277

dsPIC30F1010/202X

INDEX

A/D .................................................................................... 169

Configuring Analog Port............................................ 188

A/D Control Register (ADCON)......................................... 171

A/D Convert Pair Control Register #0 (ADCPC0) ............. 175

A/D Convert Pair Control Register #1 (ADCPC1) ............. 177

A/D Convert Pair Control Register #2 (ADCPC2) ............. 179

A/D Port Configuration Register (ADPCFG) ..................... 174

A/D Status Register (ADSTAT) ......................................... 173

AC Characteristics ............................................................ 240

Load Conditions ........................................................ 240

AC Temperature and Voltage Specifications .................... 240

ADC Register Map ............................................................ 190

Address Generator Units .................................................... 41

Alternate Vector Table ........................................................ 51

Analog Comparator Control Register Map ........................ 195

Assembler

MPASM Assembler................................................... 228

Automatic Clock Stretch.................................................... 156

During 10-bit Addressing (STREN = 1)..................... 156

During 7-bit Addressing (STREN = 1)....................... 156

Receive Mode ........................................................... 156

Transmit Mode .......................................................... 156

Band Gap Start-up Time

Requirements............................................................ 248

Timing Characteristics .............................................. 248

Barrel Shifter ....................................................................... 27

Baud Rate Error Calculation (BRGH = 0) ......................... 162

Bit-Reversed Addressing .................................................... 45

Example ...................................................................... 45

Implementation ........................................................... 45

Modifier Values (table) ................................................ 46

Sequence Table (16-Entry)......................................... 46

Block Diagrams

16-bit Timer1 Module .................................................. 88

DSP Engine ................................................................ 24

dsPIC30F1010 ............................................................ 10

dsPIC30F2020 ............................................................ 13

dsPIC30F2023 ............................................................ 16

External Power-on Reset Circuit............................... 212

I2C............................................................................. 154

Input Capture Mode .................................................... 97

Oscillator System ...................................................... 198

Output Compare Mode ............................................. 101

Reset System............................................................ 210

Shared Port Structure ................................................. 77

SPI ............................................................................ 146

UART ........................................................................ 161

C Compilers

MPLAB C18 .............................................................. 228

MPLAB C30 .............................................................. 228

CLKO and I/O Timing

Characteristics .......................................................... 245

Requirements............................................................ 245

Code Examples

Erasing a Row of Program Memory............................ 83

Initiating a Programming Sequence ............................ 84

Loading Write Latches ................................................ 84

Code Protection ................................................................ 197

Comparator Control Register (CMPCONx)....................... 193

Comparator DAC Control Registerx (CMPDACx)............. 194

Configuring Analog Port Pins.............................................. 78

Control Registers ................................................................ 82

NVMADR .................................................................... 82

NVMADRU ................................................................. 82

NVMCON.................................................................... 82

NVMKEY .................................................................... 82

Core Architecture

Overview..................................................................... 19

Core Register Map........................................................ 37, 38

Customer Change Notification Service............................. 273

Customer Notification Service .......................................... 273

Customer Support............................................................. 273

Data Access from Program Memory Using

Program Space Visibility............................................. 32

Data Accumulators and Adder/Subtracter .......................... 25

Data Space Write Saturation ...................................... 27

Overflow and Saturation ............................................. 25

Round Logic ............................................................... 26

Write Back .................................................................. 26

Data Address Space........................................................... 33

Alignment.................................................................... 36

Alignment (Figure) ...................................................... 36

MCU and DSP (MAC Class) Instructions ................... 35

Memory Map......................................................... 33, 34

Near Data Space ........................................................ 37

Software Stack ........................................................... 37

Spaces........................................................................ 36

Width .......................................................................... 36

DC Characteristics

I/O Pin Input Specifications ...................................... 238

I/O Pin Output Specifications.................................... 239

Idle Current (IIDLE) .................................................... 235

Operating Current (IDD) ............................................ 233

Power-Down Current (IPD)........................................ 237

Program and EEPROM ............................................ 239

Development Support ....................................................... 227

Device Configuration Register Map .................................. 218

Device Configuration Registers ........................................ 215

Device Overview................................................................... 9

Divide Support .................................................................... 22

DSP Engine ........................................................................ 23

Multiplier ..................................................................... 25

dsPIC30F2020 Block Diagram ........................................... 13

Dual Output Compare Match Mode .................................. 102

Continuous Pulse Mode ........................................... 102

Single Pulse Mode.................................................... 102

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